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EVDD404
Figure 4 - EVDD404 Schematic Diagram
NOTES: 1) The schematic shows all three output switches, however only one device can be installed at any one time.
2) U1 reflects the DIP- 8 package type (PI), and U2 reflects the SO-16 (SI-16) package type. However only one device
may be installed and used in the evaluation board at one time.
3) The EN (Enable) pin is not used with the IXDI404 and IXDN404 devices.
Figure 5 - IXDD404 10ns Gate Rise Time
CL=1800pF
Figure 6 - IXDD404 Typical Output Waveform
F=500KHz, CL=1800pF
IXYS Corporation
3540 Bassett St; Santa Clara, CA 95054
Tel: 408-982-0700; Fax: 408-496-0670
e-mail: sales@ixys.net
www.ixys.net
IXYS Semiconductor GmbH
Edisonstrasse15 ; D-68623; Lampertheim
Tel: +49-6206-503-0; Fax: +49-6206-503627
e-mail: marcom@ixys.de
2
Directed Energy, Inc.
An IXYS Company
2401 Research Blvd. Ste. 108
Ft. Collins, CO 80526
Tel: 970-493-1901; Fax: 970-493-1903
e-mail: deiinfo@directedenergy.com
www.directedenergy.com
Doc #9200-0232 Rev 2
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